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Hardware/software co-training by FPGA/ASIC synthesis and programming of a RISC microprocessor-core

Becker, J. E.; Bieser, C.; Thomas, A.; Müller-Glaser, K. D.; Becker, J.

Abstract: This paper describes the combination of educating both, hardware and software with one practical lab. The needs to offer such a co-training concept are brought out by the demands of industry towards the desired skills of today's engineers. An engineer's view must no longer be restricted to his/her own work, but has to be widened to a complete system view. To provide an appropriate education scheme the university courses have to adapt to these changes. Therefore an innovative lab concept is presented here. Its goal is to improve students skills not only in a single direction, but to deliver an efficient inter disciplinary hardware software lab course, combined with training state-of-the-art industrial architectures and relevant tools.


Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Jahr 2003
Sprache Englisch
Identifikator DOI: 10.1109/MSE.2003.1205288
ISBN: 0-7695-1973-3
KITopen ID: 1000014277
Erschienen in Proceedings / 2003 IEEE International Conference on Microelectronic Systems Education, June 1 - 2, 2003, Anaheim, California, USA
Verlag IEEE Computer Society, Los Alamitos (Calif.)
Seiten 134-135
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