KIT | KIT-Bibliothek | Impressum | Datenschutz

Methods for run-time failure recognition and recovery in dynamic and partial reconfigurable systems based on Xilinx Virtex-II Pro FPGAs

Paulsson, K.; Huebner, M.; Jung, M.; Becker, J.


The rapid development of hardware/software and microelectronic technology enables the realization of more complex systems with new characteristics. These characteristics could lead to further advances in electronic measurement-, control- and regulation systems. The industrial demands of future electronic systems rely on systems to be fault-tolerant, since the complexity increased to the point where it is impossible to detect all errors during the design phase. The ability for a system to recover from a failure requires that incorrect system operation can be detected and analysed during run-time. To achieve this, methods for performing tests of functionalities and components dynamically must be incorporated in the system behaviour during the design phase. This paper presents methods for efficient on-line failure detection, integrated in a reconfigurable system for execution and test of multiple automotive inner cabin functions. These methods also allow a certain degree of failure recovery, and even make it possible for a system to heal itself from more advanced faults. By exploiting the ability of dynamic and partial hardware reconfiguration, the monitoring can also be performed with less hardware overhead since the monitoring functionalities are configured only when they are required.

Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Publikationsjahr 2006
Sprache Englisch
Identifikator ISBN: 978-0-7695-2533-4
KITopen-ID: 1000014292
Erschienen in IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, 2 - 3 March 2006, Karlsruhe, Germany. Ed.: J. Becker
Verlag IEEE Computer Society
Seiten 6 S.
KIT – Die Forschungsuniversität in der Helmholtz-Gemeinschaft
KITopen Landing Page