A Novel FPGA Design Acceleration Methodology Supported by a Unique RP Platform for Fast and Easy System Develpoment
Abstract:
The novel platform concept and system design methodology the development process is shortened, which accelerates the complete design process and allows quick turn around times. For this, no knowledge of FPGA design or hardware description languages as VHDL or Verilog is necessary
| Zugehörige Institution(en) am KIT | Institut für Technik der Informationsverarbeitung (ITIV) |
| Publikationstyp | Proceedingsbeitrag |
| Publikationsjahr | 2006 |
| Sprache | Englisch |
| Identifikator | ISBN: 1-424-40312-X KITopen-ID: 1000014306 |
| Erschienen in | FPL 2006 - International Conference on Field Programmable Logic and Applications, 2006, 28 - 30 Aug. 2006, Madrid, Spain |
| Verlag | IEEE Operations Center |
| Seiten | 1 - 2 |