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H. 264 Decoder at HD Resolution on a Coarse Grain Dynamically Reconfigurable Architecture

Ganesan, M. K. A.; Singh, S.; May, F.; Becker, J.

The extreme processing platform (XPP) is a new runtime-reconfigurable data processing architecture. It is based on a scalable array of coarse grained computing elements and a packet oriented communication network. The strength of XPP originates from the combination of array processing with unique, powerful runtime-reconfiguration mechanisms. Parts of the array can be configured rapidly in parallel while neighboring computing elements are processing data. Reconfiguration is triggered by internal event signals, or by a function processing array element (FNC-PAE). The XPP-III architecture is designed to support pipelining and parallelism: instruction-level, dataflow and task-level parallelism. The control flow is handled by multiple VLIW like processors which are closely coupled to the reconfigurable array. Therefore this technology is very well suited for multimedia, telecommunications, graphics and similar stream-based applications with data and control flow. This paper presents the performance of H.264/AVC decoder on XPP-III. The simulation results are very encouraging and allow up to HD (1920x1080@24fps) decoding on the XPP-III architecture.

Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Publikationsjahr 2007
Sprache Englisch
Identifikator ISBN: 978-1-4244-1060-6
KITopen-ID: 1000014322
Erschienen in FPL 2007 - International Conference on Field Programmable Logic and Applications, 27 - 29 Aug. 2007, Amsterdam, The Netherlands
Verlag IEEE Operations Center, Piscataway (NJ)
Seiten 467 - 471
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