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SPP1148 booth: Fine grain reconfigurable architectures

Braun, L.; Schwalb, T.; Graf, P.; Hübner, M.; Becker, J.; [u. a.]

Abstract:

In this booth on fine grain reconfigurable architectures, several research groups demonstrate their joint work on operating concepts for managing dynamic and partial reconfiguration, visualization of bitstreams and routing, presenting an application applying dynamic reconfiguration for video engines as well as work on minimization of reconfiguration data. Unique is that all the above four projects present their work using the same reconfigurable FPGA-based fabric called Erlangen slot machine that has also been built within one project just the purpose of experimenting with dynamic fine grain reconfiguration as an interdisciplinary platform.


Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Publikationsjahr 2008
Sprache Englisch
Identifikator ISBN: 978-1-4244-1960-9
KITopen-ID: 1000014342
Erschienen in International Conference on Field Programmable Logic and Applications (FPL 2008), 8-10 Sept. 2008, Heidelberg, Germany
Verlag Institute of Electrical and Electronics Engineers (IEEE)
Seiten 348 - 348
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