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New dimensions for multiprocessor architectures: On demand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach

Goehringer, D.; Huebner, M.; Perschke, T.; Becker, J.

Abstract:
Multiprocessor hardware architectures enable to distribute tasks of an application to several microprocessors, in order to exploit parallelism for accelerating the performance of computation. Especially for the application domain of image data processing, where computation performance is a crucial factor to keep the real-time requirements, this approach is a promising solution for the assembly of high sophisticated algorithms e.g. for object tracking. Changing requirements and the necessary implementation of the tasks in terms of modified algorithms, precision and communication needs to be handled by software and hardware adaptation in state of the art architectures. Field programmable gate arrays (FPGAs) enable to exploit the adaptation of hardware cores and the software running on embedded microprocessor cores on an integrated multiprocessor system.


Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Jahr 2008
Sprache Englisch
Identifikator ISBN: 978-1-424-41960-9
KITopen ID: 1000014344
Erschienen in FPL 2008 - International Conference on Field Programmable Logic and Applications, 8 - 10 Sept. 2008, Heidelberg, Germany. Ed.: U. Kebschull
Verlag IEEE, Piscataway (NJ)
Seiten 495 - 498
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