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Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization

Paulsson, K.; Huebner, M.; Becker, J.

Abstract:
This paper presents the results from research work done in the field of reconfigurable architectures and systems. Dynamic and partial reconfiguration has mainly been investigated as a way to configure functionalities in hardware on-demand, controlled either by the user or by the system itself. This paper presents work that was aimed at applying hardware reconfiguration even for run-time adaptation of functional implementation in order to enable self-optimization of power and performance according to the run-time specific requirements of the application.


Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Jahr 2008
Sprache Englisch
Identifikator ISBN: 978-1-424-41960-9
KITopen ID: 1000014347
Erschienen in FPL 2008 - International Conference on Field Programmable Logic and Applications, 8 - 10 Sept. 2008, Heidelberg, Germany. Ed.: U. Kebschull
Verlag IEEE, Piscataway (NJ)
Seiten 699 - 700
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