Exploitation of dynamic and partial hardware reconfiguration for on-line power/performance optimization

This paper presents the results from research work done in the field of reconfigurable architectures and systems. Dynamic and partial reconfiguration has mainly been investigated as a way to configure functionalities in hardware on-demand, controlled either by the user or by the system itself. This paper presents work that was aimed at applying hardware reconfiguration even for run-time adaptation of functional implementation in order to enable self-optimization of power and performance according to the run-time specific requirements of the application.