Verification-based software-fault detection
Abstract:
Software is used in many safety- and security-critical systems. Software development is, however, an error-prone task. In this work new techniques for the detection of software faults (or software "bugs") are described which are based on a formal deductive verification technology. The described techniques take advantage of information obtained during verification and combine verification technology with deductive fault detection and test generation in a very unified way.
| Zugehörige Institution(en) am KIT | Institut für Theoretische Informatik (ITI) Karlsruher Institut für Technologie (KIT) |
| Publikationstyp | Hochschulschrift |
| Publikationsjahr | 2011 |
| Sprache | Englisch |
| Identifikator | ISBN: 978-3-86644-676-2 urn:nbn:de:0072-230029 KITopen-ID: 1000023002 |
| Verlag | KIT Scientific Publishing |
| Umfang | XVII, 264 S. |
| Art der Arbeit | Dissertation |
| Fakultät | Fakultät für Informatik (INFORMATIK) |
| Institut | Institut für Theoretische Informatik (ITI) |
| Prüfungsdaten | 08.02.2011 |
| Schlagwörter | Fault Detection, Theorem Proving, Model Generation, Test Generation, Dynamic Logic |
| Relationen in KITopen | |
| Referent/Betreuer | Beckert, B. |