Memory-aware Scheduling for Energy Efficiency on Multicore Processors
Memory bandwidth is a scarce resource in multicore systems. Scheduling has a dramatic impact on the delay introduced by memory contention, but also on the effectiveness of frequency scaling at saving energy. This paper investigates the cross-effects between tasks running on a multicore system, considering memory contention and the technical constraint of chip-wide frequency and voltage settings. We make the following contributions: 1) We identify the memory characteristics of tasks and sort core-specific runqueues to allow a co-scheduling of tasks with minimal energy delay product. 2) According to the memory characteristics of the workload, we set the frequency for individual chips so that the delay is only marginal. Our evaluation with a Linux implementation running on an Intel quad-core shows that memory-aware scheduling can reduce EDP considerably.
|Zugehörige Institution(en) am KIT
||Institut für Betriebs- und Dialogsysteme (IBDS)
KITopen ID: 1000026892
||Proceedings of the Workshop on Power Aware Computing and Systems (HotPower'08), San Diego, CA, December 7, 2008
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