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Invasive Computing: An Overview

Teich, Jürgen; Henkel, Jörg; Herkersdorf, Andreas; Schmitt-Landsiedel, Doris; Schröder-Preikschat, Wolfgang; Snelting, Gregor

Abstract:
We present a machine-checked formalisation of the Java memory model and connect it to an operational semantics for Java source code and bytecode. This provides the link between sequential semantics and the memory model that has been missing in the literature. Our model extends previous formalisations by dynamic memory allocation, thread spawns and joins, infinite executions, the wait-notify mechanism and thread interruption. We prove the Java data race freedom guarantee for the complete formalisation in a modular way. This work makes the assumptions about the sequential semantics explicit and shows how to discharge them.


Zugehörige Institution(en) am KIT Institut für Programmstrukturen und Datenorganisation (IPD)
Institut für Technische Informatik (ITEC)
Publikationstyp Buchaufsatz
Jahr 2011
Sprache Englisch
Identifikator ISBN: 978-1-441-96459-5
KITopen ID: 1000027288
Erschienen in Multiprocessor System-on-Chip hardware design and tool integration . Ed.: M. Hübner
Verlag Springer, Berlin
Seiten 241-268
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