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Originalveröffentlichung
DOI: 10.1109/iccse.2012.60
Scopus
Zitationen: 3

A Compilation- and Simulation-Oriented Architecture Description Language for Multicore Systems

Stripf, T.; Oey, O.; Bruckschloegl, T.; Koenig, R.; Becker, J.; Goulas, G.; Alefragis, P.; Voros, N. S.; Potman, J.; Sunesen, K.; Derrien, S.; Sentieys, O.



Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Jahr 2012
Sprache Englisch
Identifikator ISBN: 978-076954914-9
KITopen ID: 1000079189
Erschienen in 2012 IEEE 15th International Conference on Computational Science and Engineering (CSE 2012) : Paphos, Cyprus, 5 - 7 December 2012 ; [held in conjunction with the 10th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2012) and the 6th International Workshop on Ubiquitous Underwater Sensor Networks (UUWSN 2012) ; proceedings]
Verlag IEEE, Piscataway (NJ)
Seiten 383-390
Schlagworte ADL, ALMA, automated tool chains, code generation, compilation-oriented architecture description language, Data mining, error prone, Estimation, EU FP7 project architecture oriented parallelization, Hardware, high performance embedded multicore systems, interconnecting modules, microarchitecture, Multicore processing, multiprocessing systems, multiprocessor system on chip devices, optimized programs, parallel architectures, parallel processing, platform-specific programming model, processing units, program compilers, reconfigurable architectures, reconfigurable multicore architectures, Scilab, Scilab programming language, simulation-oriented architecture description language, specification languages, system-on-chip, target architectures
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