Large area silicon pixel trackers are currently under development for the High Luminosity upgrade of the LHC detectors. They are also foreseen for the detectors proposed for the future high energy Compact Linear Collider CLIC. For the CLIC tracker a single hit resolution of 7 μm, a timing resolution of a few nanoseconds and a material budget of 1–2 % of radiation length per detection layer are required. Integrated CMOS technologies are promising candidates to reduce the cost, facilitate the production and to achieve a low material budget. CMOS sensors with a small size of the collection electrode benefit from a small sensor capacitance, resulting in a large signal to noise ratio and a low power consumption.
The Investigator is a test-chip developed for the ALICE Inner Tracking System upgrade, implemented in a 180 nm CMOS process with a small collection electrode on a high resistivity epitaxial layer. The Investigator has been produced in different process variants: the standard process and a modified process, where an additional N-layer has been inserted to obtain full lateral depletion. This paper presents a comparison of test-beam results for both process variants, focuses on spatial and timing resolution as well as efficiency measurements.