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Minimizing Excess Timing Guard Banding Under Transistor Self-Heating Through Biasing at Zero-Temperature Coefficient

Salamin, Sami 1; Van Santen, Victor M.; Rapp, Martin ORCID iD icon 1; Henkel, Jorg 1; Amrouch, Hussam
1 Karlsruher Institut für Technologie (KIT)

Abstract:

Self-Heating Effects (SHE) is known as one of the key reliability challenges in FinFET and beyond. Large timing guard bands are necessary, which we try to reduce. In this work, we propose operating (biasing) processors at Zero-Temperature Coefficient (ZTC) to contain (mitigate) SHE-induced delay. Operating at ZTC allows near-zero timing guard band to protect circuits against SHE. However, a trade-off is found between thermal timing guard band and performance loss from lowering the voltage.


Verlagsausgabe §
DOI: 10.5445/IR/1000134664
Veröffentlicht am 04.07.2021
Originalveröffentlichung
DOI: 10.1109/ACCESS.2021.3057900
Scopus
Zitationen: 1
Dimensions
Zitationen: 1
Cover der Publikation
Zugehörige Institution(en) am KIT Institut für Technische Informatik (ITEC)
Publikationstyp Zeitschriftenaufsatz
Publikationsjahr 2021
Sprache Englisch
Identifikator ISSN: 2169-3536
KITopen-ID: 1000134664
Erschienen in IEEE access
Verlag Institute of Electrical and Electronics Engineers (IEEE)
Band 9
Seiten 30687–30697
Nachgewiesen in Dimensions
Scopus
Web of Science
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