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Co-Design of Approximate Multilayer Perceptron for Ultra-Resource Constrained Printed Circuits

Armeniakos, Giorgos; Zervakis, Georgios 1; Soudris, Dimitrios; Tahoori, Mehdi B. 1; Henkel, Jörg 1
1 Institut für Technische Informatik (ITEC), Karlsruher Institut für Technologie (KIT)

Abstract:

Printed Electronics (PE) exhibits on-demand, extremely low-cost hardware due to its additive manufacturing process, enabling machine learning (ML) applications for domains that feature ultra-low cost, conformity, and non-toxicity requirements that silicon-based systems cannot deliver. Nevertheless, large feature sizes in PE prohibit the realization of complex printed ML circuits. In this work, we present, for the first time, an automated printed-aware software/hardware co-design framework that exploits approximate computing principles to enable ultra-resource constrained printed multilayer perceptrons (MLPs). Our evaluation demonstrates that, compared to the state-of-the-art baseline, our circuits feature on average 6x (5.7x) lower area (power) and less than 1% accuracy loss.


Volltext §
DOI: 10.5445/IR/1000157029
Veröffentlicht am 17.03.2023
Cover der Publikation
Zugehörige Institution(en) am KIT Institut für Technische Informatik (ITEC)
Publikationstyp Forschungsbericht/Preprint
Publikationsjahr 2023
Sprache Englisch
Identifikator KITopen-ID: 1000157029
Umfang 8 S.
Vorab online veröffentlicht am 28.02.2023
Schlagwörter Approximate Computing, Co-design, Multilayer Perceptron, Printed Electronics
Nachgewiesen in arXiv
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