Approximate Accelerators: A Case Study using Runtime Reconfigurable Processors

Dennard Scaling and Amdahl’s Law have ensured
the continuous improvement of computing architectures for
years, but even after they fade, the demand for ever-increasing
performance continues to rise. Highly specialized architectures
have further increased processing power for specific use cases,
but versatility is then severely limited. Reconfigurable processors
leverage FPGA technology to close the gap between general
purpose processors and highly specialized architectures. Loading
application-specific accelerators accelerates the current application, but limited available resources and configuration time must
be taken into account. In this paper, we demonstrate the use
of approximate computing techniques within runtime reconfigurable processors. Many algorithms can tolerate a certain degree
of inaccurate calculations, which can improve the required area,
resources, energy and processing time of a hardware accelerator.
Showcasing an edge-detection algorithm, we can show a runtime
improvement of 67 % by using an approximate implementation,
while reducing the required accelerator resources by 75 %.
Our evaluation of runtime reconfiguration shows a processing
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time improvement of 14.1 ms per iteration, while accounting
for a one-time reconfiguration period of 5.61 ms. This delay
represents less than 6.87 % of the processing time of our test
image, yet it allows for the concurrent acceleration of other
algorithms on the same framework, which we demonstrated by
means of a use case running AES-256 encryption in parallel with
edge detection.