Improved Arithmetic Performance by Combining Stateful and Non‐Stateful Logic in Resistive Random Access Memory 1T–1R Crossbars

Computing-in-memory (CIM) is a promising approach for overcoming the memory-wall problem in conventional von-Neumann architectures. This is done by performing certain computation tasks directly in the storage subsystem without transferring data between storage and processing units. Stateful and non-stateful CIM concepts are recently attracting lots of interest, which are demonstrated as logical complete, energy efficient, and compatible with dense crossbar structures. However, sneak-path currents in passive resistive random access memory (RRAM) crossbars degrade the operation reliability and require the usage of active 1 Transistor–1 Resistance (1T-1R) bitcell designs. In this article, the arithmetic performance and reliability are investigated based on experimental measurements and variability-aware circuit simulations. Herein, it is aimed for the evaluation of logic operations specifically with fully integrated 1T–1R crossbar devices. Based on these operations, an N-bit full adder with optimized energy consumption and latency is demonstrated by combining stateful and non-stateful CIM logic styles with regard to the specific conditions in active 1T–1R RRAM crossbars.