Neural Evolutionary Architecture Search for Compact Printed Analog Neuromorphic Circuits

Printed electronics (PE) is an additive fabrication
technology for manufacturing electronic circuits which not only
allows for a highly flexible printing of arbitrary circuit patterns,
but also produce soft, non-toxic, and degradable electronics at an
extremely low cost. These properties are unmatched by siliconbased electronics, making PE an enabler of new application
domains, e.g., fast moving consumer goods, wearables, and
disposable healthcare devices. A particularly promising class of
circuits in this technology is the printed analog neuromorphic
circuits, offering efficient and highly tailored computational
functionalities. In this work, we leverage the highly flexible
fabrication process of PE to address the bottleneck of PE, i.e.,
the large feature sizes and low device counts. This issue is
crucial, as it impairs the integration of printed circuits into
target applications with limited footprint, such as smart bandaids. We also propose an evolutionary algorithm (EA) to improve
the circuit compactness through circuit architecture optimization.
As baseline, we compare the proposed EA method with a stateof-the-art pruning method and a modified area-aware pruning
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method. All of them are able to optimize circuit architecture
alongside the component values of printed neuromorphic circuits.
Experimental simulation reveals that the proposed EA approach
can effectively achieve compact circuits and outperform the
pruning method by 3.1× lower area with no loss of accuracy. As
a byproduct, the power is reduced by 3.0×, paving the way to
energy-harvested printed systems.