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Hardware-Accelerated On-Device Learning: Training, Partitioning, and Compilation for Constrained Edge AI

Topko, Iuliia ORCID iD icon 1; Serdyuk, Alexey 1; Harbaum, Tanja ORCID iD icon 1; Becker, Jürgen 1
1 Institut für Technik der Informationsverarbeitung (ITIV), Karlsruher Institut für Technologie (KIT)

Abstract (englisch):

Real-world applications, such as autonomous driving, require continuous adaptation of Deep Neural Networks (DNNs) to local environments. In addition to the growth of DNNs in recent years, Transfer Learning methods that adapt a pre-trained model to a new domain have become more widespread. A further improvement of these methods is on-device learning, which allows model adaptation based on the domain data directly on the device. However, efficient on-device training on constrained edge AI remains a challenging task, due to the limited available compute resources. Currently, the deployment process, from Machine Learning (ML) frameworks to hardware accelerators, is mainly optimized for inference. This paper proposes an end-to-end on-device learning strategy that considers three main aspects: algorithmic techniques for model adaptation, ML compilation, and hardware architectures capable of training. We present an initial model analysis highlighting potential partitioning points for hardware-accelerated on-device learning.


Originalveröffentlichung
DOI: 10.1109/ISVLSI65124.2025.11130214
Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Proceedingsbeitrag
Publikationsdatum 06.07.2025
Sprache Englisch
Identifikator ISBN: 979-8-3315-3477-6
KITopen-ID: 1000184902
Erschienen in IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2025)
Veranstaltung IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2025), Kalamata, Griechenland, 06.07.2025 – 09.07.2025
Verlag Institute of Electrical and Electronics Engineers (IEEE)
Seiten 6 S.
Nachgewiesen in OpenAlex
Dimensions
Scopus
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