When Faults Don’t Vanish: Persistent Fault Injection and Key Recovery on MRAM-Backed AES

Spin-Transfer Torque MRAM (STT-MRAM) is gaining popularity as a leading non-volatile memory (NVM) for embedded, IoT, and automotive systems, owing to its low leakage, high endurance, and compatibility with CMOS processes. However, its magnetic nature and non-volatility feature introduce unique fault behaviors that differ fundamentally from conventional volatile memories such as SRAM and DRAM. In particular, faults injected during MRAM write operations may persist across power cycles, enabling attackers to exploit stable key corruptions. In this work, we present a persistent fault analysis (PFA) framework targeting AES implementations where the round-key schedule is stored in STT-MRAM. We demonstrate how carefully timed voltage glitches during MRAM write cycles can create reproducible, persistent bit flips that propagate through the AES key schedule. These persistent corruptions significantly reduce the ciphertext requirements for differential fault analysis (DFA) and enable statistical persistent fault analysis (SPFA) with only 12–17 faulty ciphertexts. These findings highlight that MRAM-based systems are exposed to a persistent-fault threat model different from transient faults in volatile memories, with direct implications for secure key storage and cryptographic implementations.