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Variation-Aware Post-Manufacturing Calibration for ReRAM-based Content-Addressable Memory

Mayahinia, Mahta 1; Hezayyin, Haneen G. 1; Tahoori, Mehdi 1
1 Institut für Technische Informatik (ITEC), Karlsruher Institut für Technologie (KIT)

Abstract:

Measuring similarity between binary patterns is fundamental to many data-intensive applications and can greatly benefit from Computation-in-Memory (CiM) architectures. It is a core operation in domains such as search engines and artificial intelligence (AI). Content Addressable Memory (CAM) provides a highly efficient hardware solution for accelerating these operations based on the CiM paradigm. To improve performance and energy efficiency, non-volatile memory (NVM) technologies such as redox-based RAM (ReRAM) are increasingly used to implement CAM, forming ReRAM-based CAM (ReCAM). These devices are susceptible to process variation (PV), especially both local and global, caused by immature fabrication processes and analog CiM realizations causing unnecessary yield loss. As a result, a conventional pass/fail manufacturing test can incorrectly reject functional chips. Therefore, this work proposes a postmanufacturing calibration method, embedded within the ReCAM test flow, to address global variations and thereby improve yield. This is achieved by determining the boundaries between similarity levels (i.e., Hamming distances) on a per-chip basis using a low-overhead Look-Up Table (LUT). ... mehr


Originalveröffentlichung
DOI: 10.1109/VTS69484.2026.11563394
Zugehörige Institution(en) am KIT Institut für Technische Informatik (ITEC)
Publikationstyp Proceedingsbeitrag
Publikationsdatum 27.04.2026
Sprache Englisch
Identifikator ISBN: 979-8-3315-6337-0
ISSN: 2375-1053
KITopen-ID: 1000195157
Erschienen in 2026 IEEE 44th VLSI Test Symposium (VTS)
Veranstaltung 44th IEEE VLSI Test Symposium (VTS 2026), Napa, CA, USA, 27.04.2026 – 29.04.2026
Verlag Institute of Electrical and Electronics Engineers (IEEE)
Seiten 1–7
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