PT Unknown
AU Bieser, C
   Mueller-Glaser, KD
TI Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs
SE Proceedings / Seventeenth IEEE International Workshop on Rapid System Prototyping, shortening the path from specification to prototype, 14 - 16 June 2006, Chania, Crete, Greece
PY 2006
BP 193
EP 199
LA english
ER