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URN: urn:nbn:de:swb:90-453050

A Scalable and Adaptive Network on Chip for Many-Core Architectures

Heißwolf, Jan

In this work, a scalable network on chip (NoC) for future many-core architectures is proposed and investigated. It supports different QoS mechanisms to ensure predictable communication. Self-optimization is introduced to adapt the energy footprint and the performance of the network to the communication requirements. A fault tolerance concept allows to deal with permanent errors. Moreover, a template-based automated evaluation and design methodology and a synthesis flow for NoCs is introduced.

Zugehörige Institution(en) am KIT Institut für Technik der Informationsverarbeitung (ITIV)
Publikationstyp Hochschulschrift
Jahr 2014
Sprache Englisch
Identifikator KITopen-ID: 1000045305
Verlag Karlsruhe
Abschlussart Dissertation
Fakultät Fakultät für Elektrotechnik und Informationstechnik (ETIT)
Institut Institut für Technik der Informationsverarbeitung (ITIV)
Prüfungsdaten 11.11.2014
Referent/Betreuer Prof. J. Becker
Schlagworte Network-on-Chip, Quality-of-Service, Self-Optimization, Scalability, Many-Core
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