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Simulation of the Thermal Performance of HTS Coated Conductors for HVDC SFCL

Sousa, W. T. B. de ORCID iD icon; Kudymow, A. 1; Strauss, S. 1; Palasz, S. 1; Elschner, S. 1; Noe, M. ORCID iD icon 1
1 Karlsruher Institut für Technologie (KIT)


Within the EU-funded project FastGrid a resistive superconducting fault current limiter for DC-application is actually under development. To reduce substantially the amount of deployed superconducting tape an increase of voltage per length in the limitation case is needed. Moreover, the resistive transition (quench) should be fast and uniform. In the present work, the thermal behavior of three different architectures of coated conductors are investigated by means of transient simulations. The first architecture is composed by an additional Hastelloy shunt layer, which is supposed to avoid overheating of the conductor during fault limitation. The other architectures include layers of silver and copper as stabilizers. Our parameter study including the geometries of the different layers and the inhomogeneity of the critical current density of the superconducting tape shall lead to an optimized tape layout. First comparisons with experiment indicate, that, with the first architecture, electric field strength up to 100 V/m should be within reach.

Verlagsausgabe §
DOI: 10.5445/IR/1000127155
DOI: 10.1088/1742-6596/1559/1/012097
Zitationen: 3
Zitationen: 3
Cover der Publikation
Zugehörige Institution(en) am KIT Institut für Technische Physik (ITEP)
Publikationstyp Zeitschriftenaufsatz
Publikationsjahr 2020
Sprache Englisch
Identifikator ISSN: 1742-6588, 1742-6596
KITopen-ID: 1000127155
HGF-Programm 37.06.02 (POF III, LK 01) New Power Network Technology
Erschienen in Journal of physics / Conference series
Verlag Institute of Physics Publishing Ltd (IOP Publishing Ltd)
Band 1559
Seiten Art.Nr. 012097
Nachgewiesen in Scopus
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