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Real-Time Power Loss Optimized Operation of a Solid State Transformer by Utilizing the Common-Mode Voltage

Merz, Tobias ORCID iD icon 1; Menger, Nikolas ORCID iD icon 1; Siegemund, Max-Emanuel; Schwendemann, Rüdiger ORCID iD icon 1; Hiller, Marc 1
1 Elektrotechnisches Institut (ETI), Karlsruher Institut für Technologie (KIT)

Abstract:

This article presents a general methodology and a real-time solvable, analytical model for reducing the total losses of the cells of a Solid-State Transformer (SST). The efficiency is increased with the usage of the online optimized common-mode voltage u CM . Measurements on a 400V AC to 750V DC , 45kW SST test bench verify the calculation results and the operating principle of the algorithm. A loss reduction of up to 20% is possible without introducing additional restrictions to the SST.


Verlagsausgabe §
DOI: 10.5445/IR/1000189223
Veröffentlicht am 22.12.2025
Originalveröffentlichung
DOI: 10.34746/epe2025-0027
Cover der Publikation
Zugehörige Institution(en) am KIT Elektrotechnisches Institut (ETI)
Publikationstyp Proceedingsbeitrag
Publikationsjahr 2025
Sprache Englisch
Identifikator KITopen-ID: 1000189223
Erschienen in The 26th European Conference on Power Electronics and Applications, GDR SEEDS France and EPE Association, Mar 2025, Paris, France
Veranstaltung European Conference on Power Electronics and Applications (2025), Paris, Frankreich, 31.03.2025 – 04.04.2025
Verlag Groupement de Recherche (GDR)
Seiten 10 S.
Nachgewiesen in OpenAlex
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